Difference between revisions of "RK3399"

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(Created page with "Rockchip ARM processor found on e.g. Orange Pi 4. == External == * Rockchip Wiki on RK3399 [http://opensource.rock-chips.com/wiki_RK3399]")
 
 
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[[Rockchip]] [[ARM processor]] found on e.g. [[Orange Pi 4]].
 
[[Rockchip]] [[ARM processor]] found on e.g. [[Orange Pi 4]].
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== Specification ==
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[[File:RK3399 Block Diagram.png|thumb|right|RK3399 block diagram. Source: [http://opensource.rock-chips.com/images/5/5a/RK3399_Block_Diagram.png]]]
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*CPU:
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**[[Big.Little architecture]]: Dual [[Cortex-A72]] + Quad [[Cortex-A53]], 64-bit CPU
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**Frequency is over 1.8GHz (Big cluster)
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**L1 cache
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***48KB Icache and 32KB Dcache for each A72
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***32KB Icache and 32KB Dcache for each A53 
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**L2 cache
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***1024KB for big cluster
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***512KB for little cluster   
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*Internal SRAM
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**192KB total
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**4KB used by bootrom when bootup 
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*GPU:
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** [[Mali-T864]] GPU, OpenGL ES1.1/2.0/3.0/3.1, OpenCL, DX11
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**Supports AFBC (ARM Frame Buffer Compression) 
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*Display:
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**Dual VOP: one supports 4096x2160 with AFBC supported；The other supports 2560x1600
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**Dual channel MIPI-DSI (4 lanes per channel)
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**eDP 1.3 (4 lanes with 10.8Gbps) to support display, with PSR
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**HDMI 2.0 for 4K 60Hz with HDCP 1.4/2.2
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**DisplayPort 1.2 (4 lanes, up to 4K 60Hz)
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**Supports Rec.2020 and conversion to Rec.709 
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*Camera:
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** Dual mipi CSI，dual ISP,Maximum input resolution of 13M pixels 
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*Memory:
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**Dual channels 64-bit DRAM controller
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**Support DDR3/DDR3L, LPDDR3, LPDDR4 
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*Connectivity:
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**PCIe 2.1 (4 full-duplex lanes with 20Gbps)
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**Embedded low power MCU for other application
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**8 channels I2S supports 8 channels RX or 8 channels TX 
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Source: [http://opensource.rock-chips.com/wiki_RK3399]
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There is a "hidden" low-power, low-cost [[Cortex-M0]] MCU.
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It implements power-management functionality and helpers (e.g. DRAM frequency switching support). [https://www.theobroma-systems.com/rk3399-q7-user-manual/04-software.html]
  
 
== External ==
 
== External ==
 
* Rockchip Wiki on RK3399 [http://opensource.rock-chips.com/wiki_RK3399]
 
* Rockchip Wiki on RK3399 [http://opensource.rock-chips.com/wiki_RK3399]

Latest revision as of 21:12, 24 March 2020

Rockchip ARM processor found on e.g. Orange Pi 4.

Specification

RK3399 block diagram. Source: [1]
  • CPU:
    • Big.Little architecture: Dual Cortex-A72 + Quad Cortex-A53, 64-bit CPU
    • Frequency is over 1.8GHz (Big cluster)
    • L1 cache
      • 48KB Icache and 32KB Dcache for each A72
      • 32KB Icache and 32KB Dcache for each A53
    • L2 cache
      • 1024KB for big cluster
      • 512KB for little cluster
  • Internal SRAM
    • 192KB total
    • 4KB used by bootrom when bootup
  • GPU:
    •  Mali-T864 GPU, OpenGL ES1.1/2.0/3.0/3.1, OpenCL, DX11
    • Supports AFBC (ARM Frame Buffer Compression)
  • Display:
    • Dual VOP: one supports 4096x2160 with AFBC supported；The other supports 2560x1600
    • Dual channel MIPI-DSI (4 lanes per channel)
    • eDP 1.3 (4 lanes with 10.8Gbps) to support display, with PSR
    • HDMI 2.0 for 4K 60Hz with HDCP 1.4/2.2
    • DisplayPort 1.2 (4 lanes, up to 4K 60Hz)
    • Supports Rec.2020 and conversion to Rec.709
  • Camera:
    •  Dual mipi CSI，dual ISP,Maximum input resolution of 13M pixels
  • Memory:
    • Dual channels 64-bit DRAM controller
    • Support DDR3/DDR3L, LPDDR3, LPDDR4
  • Connectivity:
    • PCIe 2.1 (4 full-duplex lanes with 20Gbps)
    • Embedded low power MCU for other application
    • 8 channels I2S supports 8 channels RX or 8 channels TX

Source: [2]

There is a "hidden" low-power, low-cost Cortex-M0 MCU. It implements power-management functionality and helpers (e.g. DRAM frequency switching support). [3]

External

  • Rockchip Wiki on RK3399 [4]
Retrieved from "https://kb.d5o.eu/index.php?title=RK3399&oldid=126"